1. Field of the Invention
The present invention relates generally to methods for chemical vapor deposition (CVD) of undoped and doped silicon, and more particularly to a method for CVD of undoped and doped silicon employing a novel combination of flow rate, temperature and pressure to achieve improved film properties at a high rate of deposition at low pressure.
2. Brief Description of the Prior Art
Amorphous, polycrystalline and epitaxial silicon are used in the manufacturing of semiconductor devices and deposited onto substrates (i.e. wafers) by chemical vapor deposition. Such processes are carried out in a variety of commercially available hot wall and cold wall reactors. Deposition is accomplished by placing a substrate in a vacuum chamber, heating the substrate and introducing silane or any similar precursor such as disilane, dichlorosilane, silicon tetrachloride and the like, with or without other gases. Deposition rates of approximately 30 to 200 angstroms per minute are achieved for low pressure processes (less than 1 Torr) as described in "Polycrystalline Silicon for Integrated Circuit Applications" (T. Kamins, Kluwer Academic Publishers, 1988, p. 29). There are also some high pressure processes available (25 to 350 Torr) that can achieve deposition rates up to about 3,000 angstroms per minute as described in detail in U.S. Pat. Nos. 5,576,059 and 5,607,724 and 5,614,257.
A typical prior art vertical furnace low pressure chemical vapor deposition (LPCVD) system is depicted in FIG. 1 and includes a chamber consisting of a quartz tube 10 and chamber seal plate 12 into which is inserted a boat 14 for carrying a plurality of substrates 16. Silane or other similar precursor and a carrier gas such as hydrogen and a dopant gas such as phosphine enter the gas injection tube (or tubes) 18 from the gas inlet tube (or tubes) 20 through the chamber seal plate 12. The gases exit the process chamber through the seal plate 12 and out the exhaust port 24. A plurality of heater elements 26 are separately controlled and adjustable to compensate for the well-known depletion of the feed gas concentration as the gas flows from the gas injection tube 18 to the chamber exhaust port 24. This type of deposition system typically operates in the 200 mTorr to 500 mTorr range (200.times.10.sup.-3 Torr to 500.times.10.sup.-3 Torr). Operating at this low partial pressure of silane, or other similar precursor, results in low deposition rates of the typically 30 to 200 angstroms per minute for deposition of pure silicon, and 5 to 30 angstroms per minute if a dopant gas is introduced. Operation at higher concentrations of reactant gases results in non-uniform deposition across the substrates and great differences in the deposition rate from substrate to substrate. Increased flow rates could improve the deposition uniformity at higher pressures, however increased gas flow increases the reactive gas pressure at the injection tube holes causing gas phase nucleation resulting in particles being deposited on the substrates. Other problems associated with this reactor include film deposition on the interior quartz tube 10 and gas injection tube 18. This unwanted deposition decreases the partial pressure of the reactive feed gas concentration near the surface of the substrate 16 resulting in a reduced deposition rate and potential contamination caused when film deposited on the wall of tube 10 and injector tube 18 flakes off and deposits on the substrates 16. Finally, to offset the depletion of the reactive chemical species from the entrance to the exit of this style reactor, a temperature gradient is determined across the substrate load zone that gives a uniform deposition rate profile. However, this creates a different problem because, in the case of polysilicon deposition, the grain size is temperature dependent, and this temperature gradient causes the polysilicon grain size to vary across the load zone. This variation in grain size from substrate to substrate within a plurality of substrates can cause problems with subsequent patterning of the polysilicon and variations in the electrical performance of integrated circuits.
Another prior art reactor is illustrated in FIG. 2 and described in detail in U.S. Pat. No. 5,108,792. A substrate 28 is placed on a rotating substrate carrier 30, enclosed in a vacuum tight chamber having an upper quartz dome 32 and a lower quartz dome 34 and associated chamber wall 36. The substrate 28 is heated by upper lamps 38 and lower lamps 40. Reactant gases are injected through gas input tube 42 and exhausted through exhaust tube 44. This reactor overcomes some of the limitations of the vertical furnace reactor of FIG. 1. The reactor can be operated at higher pressures than vertical LPCVD furnaces and does not have an injector tube and its associated problems. The reactor construction and high rate of deposition at high pressure (typically greater than 10 Torr) is explained in U.S. Pat. Nos. 5,576,059 and 5,607,724 and 5,614,257.
Increased deposition rates result in higher machine productivity and more importantly reduce the time the substrates are exposed to high temperatures, i.e. &gt;600.degree. C. Reduced time at high temperatures is important during the fabrication of semiconductor devices as the device sizes become smaller. Elevated temperatures, i.e. &gt;600.degree. C., for any extended time cause unwanted changes in semiconductor device structure. A disadvantage of the prior art high pressure methods is that operating at high pressure can cause a gas phase reaction which can produce particulate contamination on the wafer.
U.S. Pat. No. 5,551,985 by Brors et al. describes a CVD reactor that provides improved uniformity in heating a wafer, and a highly uniform gas flow across the surface of a wafer. U.S. patent applications Ser. Nos. 08/909,461 filed on Aug. 11, 1997, and 09/228,835 and 09/228,840 filed on Jan. 12, 1999, the disclosures of which are incorporated herein by reference, describe wafer chambers in which related processes may also be used.